Measurement-computing CIO-QUAD0x Manuel d'utilisateur Page 10
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4 REGISTER MAP AND DESCRIPTIONS
4.1 OVERVIEW
The following section tabulates the register map of the CIO-QUAD series and briefly describes the commands necessary to
program the CIO-QUAD at the register level. The heart of the board is the LSI/CSI LS7266R1, a powerful device which is
highly integrated, requiring fewer external components. As seen in the LS7266R1 block diagram, many functions are
controlled through register programming. Refer to the register map in Table 4-1 below and the following descriptions.
Table 4-1. Register Map
6
Register Data Bits
D7 D6 D5 D4 D3 D2 D1 D0 Function
Base + 0RDD7D6D5D4D3D2D1D0Read Channel 1 OL byte segment addressed by BP
WR D7 D6 D5 D4 D3 D2 D1 D0 Write Channel 1 PR byte segment addressed by BP
Base + 1 RD 0 IDX U/D* E S CPT CT BT Read Channel 1 FLAG register
WR 0 0 0 *-------------- SEE LS7266R1 SPEC ----------------
-
Write to Channel 1 RLD register
WR 0 0 1 *-------------- SEE LS7266R1 SPEC ----------------
-
Write to Channel 1 CMR register
WR 0 1 0 *-------------- SEE LS7266R1 SPEC ----------------
-
Write to Channel 1 IOR register
WR 0 1 1
*-------------- SEE LS7266R1 SPEC -----------------
Write to Channel 1 IDR register
WR 1 0 0
*-------------- SEE LS7266R1 SPEC -----------------
Write to Channel 1 and 2 RLD register
WR 1 0 1 *-------------- SEE LS7266R1 SPEC ----------------
-
Write to Channel 1 and 2 CMR register
WR 1 1 0 *-------------- SEE LS7266R1 SPEC ----------------
-
Write to Channel 1 and 2 IOR register
WR 1 1 1 *-------------- SEE LS7266R1 SPEC ----------------
-
Write to Channel 1 and 2 IDR register
Base + 2RDD7D6D5D4D3D2D1D0Read Channel 2 OL byte segment addressed by BP
WR D7 D6 D5 D4 D3 D2 D1 D0 Write Channel 2 PR byte segment addressed by BP
Base + 3 RD 0 IDX U/D* E S CPT CT BT Read Channel 2 FLAG register
WR 0 0 0 *-------------- SEE LS7266R1 SPEC ----------------
-
Write to Channel 2 RLD register
WR 0 0 1 *-------------- SEE LS7266R1 SPEC ----------------
-
Write to Channel 2 CMR register
WR 0 1 0
*-------------- SEE LS7266R1 SPEC -----------------
Write to Channel 2 IOR register
WR 0 1 1
*-------------- SEE LS7266R1 SPEC -----------------
Write to Channel 2 IDR register
WR 1 0 0
*-------------- SEE LS7266R1 SPEC -----------------
Write to Channel 1 and 2 RLD register
WR 1 0 1 *-------------- SEE LS7266R1 SPEC ----------------
-
Write to Channel 1 and 2 CMR register
WR 1 1 0 *-------------- SEE LS7266R1 SPEC ----------------
-
Write to Channel 1 and 2 IOR register
WR 1 1 1 *-------------- SEE LS7266R1 SPEC ----------------
-
Write to Channel 1 and 2 IDR register
Base + 4RDD7D6D5D4D3D2D1D0Read Channel 3 OL byte segment addressed by BP
WR D7 D6 D5 D4 D3 D2 D1 D0 Write Channel 3 PR byte segment addressed by BP
Base + 5 RD 0 IDX U/D* E S CPT CT BT Read Channel 3 FLAG register
WR 0 0 0 *-------------- SEE LS7266R1 SPEC ----------------
-
Write to Channel 3 RLD register
WR 0 0 1 *-------------- SEE LS7266R1 SPEC ----------------
-
Write to Channel 3 CMR register
WR 0 1 0
*-------------- SEE LS7266R1 SPEC -----------------
Write to Channel 3 IOR register
WR 0 1 1
*-------------- SEE LS7266R1 SPEC -----------------
Write to Channel 3 IDR register
WR 1 0 0
*-------------- SEE LS7266R1 SPEC -----------------
Write to Channel 3 and 4 RLD register
WR 1 0 1 *-------------- SEE LS7266R1 SPEC ----------------
-
Write to Channel 3 and 4 CMR register
WR 1 1 0 *-------------- SEE LS7266R1 SPEC ----------------
-
Write to Channel 3 and 4 IOR register
WR 1 1 1 *-------------- SEE LS7266R1 SPEC ----------------
-
Write to Channel 3 and 4 IDR register
Base + 6RDD7D6D5D4D3D2D1D0Read Channel 4 OL byte segment addressed by BP
WR D7 D6 D5 D4 D3 D2 D1 D0 Write Channel 4 PR byte segment addressed by BP
Base + 7 RD 0 IDX U/D* E S CPT CT BT Read Channel 4 FLAG register
WR 0 0 0 *-------------- SEE LS7266R1 SPEC ----------------
-
Write to Channel 4 RLD register
WR 0 0 1 *-------------- SEE LS7266R1 SPEC ----------------
-
Write to Channel 4 CMR register
WR 0 1 0
*-------------- SEE LS7266R1 SPEC -----------------
Write to Channel 4 IOR register
WR 0 1 1
*-------------- SEE LS7266R1 SPEC -----------------
Write to Channel 4 IDR register
WR 1 0 0
*-------------- SEE LS7266R1 SPEC -----------------
Write to Channel 3 and 4 RLD register
WR 1 0 1 *-------------- SEE LS7266R1 SPEC ----------------
-
Write to Channel 3 and 4 CMR register
WR 1 1 0 *-------------- SEE LS7266R1 SPEC ----------------
-
Write to Channel 3 and 4 IOR register
WR 1 1 1 *-------------- SEE LS7266R1 SPEC ----------------
-
Write to Channel 3 and 4 IDR register
Bas e + 8 RD CBINT 4 CBINT 3 CB INT 2 CB INT 1 IND4S EL IND3S EL IND2S EL IND1S EL Interrupt routing control register
WR CBINT4 CBINT3 CBINT2 CBINT1 IND4SEL IND3SEL IND2SEL IND1SEL
Base + 9 RD N/A PH4B1 PH4B0 PH4A PH3B PH3A PH2B PH2A Input signal control register (for cascading counters)
WR N/A PH4B1 PH4B0 PH4A PH3B PH3A PH2B PH2A
Base + 10 RD *-------------------- 8259 Programmable Interrupt Controller Port A --------------------
-
Programmable Interrupt Controller Port A
WR *-------------------- 8259 Programmable Interrupt Controller Port A -----------------------*
Base + 11 RD
*-------------------- 8259 Programmable Interrupt Controller Port B --------------------
Programmable Interrupt Controller Port B
WR *-------------------- 8259 Programmable Interrupt Controller Port B -----------------------*
Base + 12 RD N/A N/A N/A N/A INTE INT2 INT1 INT0 Interrupt selection register
WR N/A N/A N/A N/A INTE INT2 INT1 INT0
- CIO-QUAD02 1
- CIO-QUAD04 1
- 2 & 4 Channel Quadrature 1
- Encoder Input Boards 1
- User’s Manual 1
- Table of Contents 3
- This page is blank 4
- 1 INTRODUCTION 5
- CIO-QUAD04 6
- CIO-QUAD02 6
- 2 INSTALLATION 7
- 2.2.4 Termination Resistors 8
- 3 CIO-QUAD CONNECTOR DIAGRAM 9
- 4.1 OVERVIEW 10
- 5 ELECTRICAL SPECIFICATIONS 17
- EC Declaration of Conformity 19
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