Measurement-computing CIO-DAS800 Manuel d'utilisateur télécharger pdf (Page 12)

Figure 1-1. Counter/Timer Functional Diagram

Figure 1-1 shows the 82C54 functions, I/O pins and how these are connected on the CIO-DAS800.

The CIO-DAS800 CTR2 input is connected to the PC bus clock/2 or the 1 MHz. crystal signal. The

system default is the PC bus clock.

Software controls the counters that generate the A/D pacing pulse.

Note: A/D conversions are triggered by falling-edge signals. The pulses generated by the 82C54 are

low-going for one count length. The A/D is triggered as the signal goes low. Any A/D trigger signal you

supply externally must also be low-going at the desired moment of A/D conversion.

10 MHZ CRYSTAL

OSCILLATOR

DIVIDE BY

CLK 2

CLK 1

CLK 0

CASCADE

CONTROL

LOGIC

PACER

CONTROL

LOGIC

OUT 0

OUT 1

OUT 2

CTR 0 OUT

CTR 1 OUT

CTR 2

OUT

+5VD

ALL

10K

GATE 0

GATE 1

GATE 2

INT INPUT /

XCLK

DIN 1/

TRIG

82C54

START CONVERT

1 2 ... 7 8 9 10 11 12 13 14 15 16 17 18 19 20

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Measurement-computing CIO-DAS800 Manuel d'utilisateur Page 12